351 lines
13 KiB
Plaintext
351 lines
13 KiB
Plaintext
/**
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* Copyright 2020-2023 by XGBoost Contributors
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*/
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#include <thrust/iterator/transform_iterator.h>
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#include <thrust/reduce.h>
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#include <algorithm>
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#include <cstdint> // uint32_t
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#include <limits>
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#include "../../common/deterministic.cuh"
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#include "../../common/device_helpers.cuh"
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#include "../../data/ellpack_page.cuh"
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#include "histogram.cuh"
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#include "row_partitioner.cuh"
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#include "xgboost/base.h"
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namespace xgboost {
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namespace tree {
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namespace {
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struct Pair {
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GradientPair first;
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GradientPair second;
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};
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__host__ XGBOOST_DEV_INLINE Pair operator+(Pair const& lhs, Pair const& rhs) {
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return {lhs.first + rhs.first, lhs.second + rhs.second};
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}
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} // anonymous namespace
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struct Clip : public thrust::unary_function<GradientPair, Pair> {
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static XGBOOST_DEV_INLINE float Pclip(float v) { return v > 0 ? v : 0; }
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static XGBOOST_DEV_INLINE float Nclip(float v) { return v < 0 ? abs(v) : 0; }
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XGBOOST_DEV_INLINE Pair operator()(GradientPair x) const {
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auto pg = Pclip(x.GetGrad());
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auto ph = Pclip(x.GetHess());
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auto ng = Nclip(x.GetGrad());
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auto nh = Nclip(x.GetHess());
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return {GradientPair{pg, ph}, GradientPair{ng, nh}};
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}
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};
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/**
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* In algorithm 5 (see common::CreateRoundingFactor) the bound is calculated as
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* $max(|v_i|) * n$. Here we use the bound:
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*
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* \begin{equation}
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* max( fl(\sum^{V}_{v_i>0}{v_i}), fl(\sum^{V}_{v_i<0}|v_i|) )
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* \end{equation}
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*
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* to avoid outliers, as the full reduction is reproducible on GPU with reduction tree.
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*/
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GradientQuantiser::GradientQuantiser(common::Span<GradientPair const> gpair) {
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using GradientSumT = GradientPairPrecise;
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using T = typename GradientSumT::ValueT;
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dh::XGBCachingDeviceAllocator<char> alloc;
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thrust::device_ptr<GradientPair const> gpair_beg{gpair.data()};
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auto beg = thrust::make_transform_iterator(gpair_beg, Clip());
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#if defined(XGBOOST_USE_CUDA)
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Pair p =
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dh::Reduce(thrust::cuda::par(alloc), beg, beg + gpair.size(), Pair{}, thrust::plus<Pair>{});
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#elif defined(XGBOOST_USE_HIP)
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Pair p =
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dh::Reduce(thrust::hip::par(alloc), beg, beg + gpair.size(), Pair{}, thrust::plus<Pair>{});
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#endif
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// Treat pair as array of 4 primitive types to allreduce
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using ReduceT = typename decltype(p.first)::ValueT;
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static_assert(sizeof(Pair) == sizeof(ReduceT) * 4, "Expected to reduce four elements.");
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collective::Allreduce<collective::Operation::kSum>(reinterpret_cast<ReduceT*>(&p), 4);
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GradientPair positive_sum{p.first}, negative_sum{p.second};
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std::size_t total_rows = gpair.size();
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collective::Allreduce<collective::Operation::kSum>(&total_rows, 1);
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auto histogram_rounding =
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GradientSumT{common::CreateRoundingFactor<T>(
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std::max(positive_sum.GetGrad(), negative_sum.GetGrad()), total_rows),
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common::CreateRoundingFactor<T>(
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std::max(positive_sum.GetHess(), negative_sum.GetHess()), total_rows)};
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using IntT = typename GradientPairInt64::ValueT;
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/**
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* Factor for converting gradients from fixed-point to floating-point.
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*/
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to_floating_point_ =
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histogram_rounding /
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static_cast<T>(static_cast<IntT>(1)
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<< (sizeof(typename GradientSumT::ValueT) * 8 - 2)); // keep 1 for sign bit
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/**
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* Factor for converting gradients from floating-point to fixed-point. For
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* f64:
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*
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* Precision = 64 - 1 - log2(rounding)
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*
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* rounding is calcuated as exp(m), see the rounding factor calcuation for
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* details.
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*/
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to_fixed_point_ = GradientSumT(static_cast<T>(1) / to_floating_point_.GetGrad(),
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static_cast<T>(1) / to_floating_point_.GetHess());
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}
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XGBOOST_DEV_INLINE void
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AtomicAddGpairShared(xgboost::GradientPairInt64 *dest,
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xgboost::GradientPairInt64 const &gpair) {
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auto dst_ptr = reinterpret_cast<int64_t *>(dest);
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auto g = gpair.GetQuantisedGrad();
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auto h = gpair.GetQuantisedHess();
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AtomicAdd64As32(dst_ptr, g);
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AtomicAdd64As32(dst_ptr + 1, h);
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}
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// Global 64 bit integer atomics at the time of writing do not benefit from being separated into two
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// 32 bit atomics
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XGBOOST_DEV_INLINE void AtomicAddGpairGlobal(xgboost::GradientPairInt64* dest,
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xgboost::GradientPairInt64 const& gpair) {
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auto dst_ptr = reinterpret_cast<uint64_t*>(dest);
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auto g = gpair.GetQuantisedGrad();
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auto h = gpair.GetQuantisedHess();
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atomicAdd(dst_ptr,
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*reinterpret_cast<uint64_t*>(&g));
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atomicAdd(dst_ptr + 1,
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*reinterpret_cast<uint64_t*>(&h));
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}
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template <int kBlockThreads, int kItemsPerThread,
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int kItemsPerTile = kBlockThreads* kItemsPerThread>
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class HistogramAgent {
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GradientPairInt64* smem_arr_;
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GradientPairInt64* d_node_hist_;
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dh::LDGIterator<const RowPartitioner::RowIndexT> d_ridx_;
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const GradientPair* d_gpair_;
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const FeatureGroup group_;
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const EllpackDeviceAccessor& matrix_;
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const int feature_stride_;
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const std::size_t n_elements_;
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const GradientQuantiser& rounding_;
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public:
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__device__ HistogramAgent(GradientPairInt64* smem_arr,
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GradientPairInt64* __restrict__ d_node_hist, const FeatureGroup& group,
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const EllpackDeviceAccessor& matrix,
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common::Span<const RowPartitioner::RowIndexT> d_ridx,
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const GradientQuantiser& rounding, const GradientPair* d_gpair)
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: smem_arr_(smem_arr),
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d_node_hist_(d_node_hist),
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d_ridx_(d_ridx.data()),
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group_(group),
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matrix_(matrix),
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feature_stride_(matrix.is_dense ? group.num_features : matrix.row_stride),
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n_elements_(feature_stride_ * d_ridx.size()),
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rounding_(rounding),
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d_gpair_(d_gpair) {}
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__device__ void ProcessPartialTileShared(std::size_t offset) {
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for (std::size_t idx = offset + threadIdx.x;
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idx < std::min(offset + kBlockThreads * kItemsPerTile, n_elements_);
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idx += kBlockThreads) {
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int ridx = d_ridx_[idx / feature_stride_];
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int gidx =
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matrix_
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.gidx_iter[ridx * matrix_.row_stride + group_.start_feature + idx % feature_stride_] -
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group_.start_bin;
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if (matrix_.is_dense || gidx != matrix_.NumBins()) {
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auto adjusted = rounding_.ToFixedPoint(d_gpair_[ridx]);
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AtomicAddGpairShared(smem_arr_ + gidx, adjusted);
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}
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}
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}
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// Instruction level parallelism by loop unrolling
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// Allows the kernel to pipeline many operations while waiting for global memory
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// Increases the throughput of this kernel significantly
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__device__ void ProcessFullTileShared(std::size_t offset) {
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std::size_t idx[kItemsPerThread];
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int ridx[kItemsPerThread];
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int gidx[kItemsPerThread];
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GradientPair gpair[kItemsPerThread];
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#pragma unroll
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for (int i = 0; i < kItemsPerThread; i++) {
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idx[i] = offset + i * kBlockThreads + threadIdx.x;
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}
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#pragma unroll
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for (int i = 0; i < kItemsPerThread; i++) {
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ridx[i] = d_ridx_[idx[i] / feature_stride_];
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}
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#pragma unroll
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for (int i = 0; i < kItemsPerThread; i++) {
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gpair[i] = d_gpair_[ridx[i]];
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gidx[i] = matrix_.gidx_iter[ridx[i] * matrix_.row_stride + group_.start_feature +
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idx[i] % feature_stride_];
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}
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#pragma unroll
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for (int i = 0; i < kItemsPerThread; i++) {
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if ((matrix_.is_dense || gidx[i] != matrix_.NumBins())) {
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auto adjusted = rounding_.ToFixedPoint(gpair[i]);
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AtomicAddGpairShared(smem_arr_ + gidx[i] - group_.start_bin, adjusted);
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}
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}
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}
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__device__ void BuildHistogramWithShared() {
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dh::BlockFill(smem_arr_, group_.num_bins, GradientPairInt64());
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__syncthreads();
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std::size_t offset = blockIdx.x * kItemsPerTile;
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while (offset + kItemsPerTile <= n_elements_) {
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ProcessFullTileShared(offset);
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offset += kItemsPerTile * gridDim.x;
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}
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ProcessPartialTileShared(offset);
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// Write shared memory back to global memory
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__syncthreads();
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for (auto i : dh::BlockStrideRange(0, group_.num_bins)) {
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AtomicAddGpairGlobal(d_node_hist_ + group_.start_bin + i, smem_arr_[i]);
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}
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}
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__device__ void BuildHistogramWithGlobal() {
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for (auto idx : dh::GridStrideRange(static_cast<std::size_t>(0), n_elements_)) {
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int ridx = d_ridx_[idx / feature_stride_];
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int gidx =
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matrix_
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.gidx_iter[ridx * matrix_.row_stride + group_.start_feature + idx % feature_stride_];
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if (matrix_.is_dense || gidx != matrix_.NumBins()) {
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auto adjusted = rounding_.ToFixedPoint(d_gpair_[ridx]);
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AtomicAddGpairGlobal(d_node_hist_ + gidx, adjusted);
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}
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}
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}
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};
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template <bool use_shared_memory_histograms, int kBlockThreads,
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int kItemsPerThread>
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__global__ void __launch_bounds__(kBlockThreads)
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SharedMemHistKernel(const EllpackDeviceAccessor matrix,
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const FeatureGroupsAccessor feature_groups,
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common::Span<const RowPartitioner::RowIndexT> d_ridx,
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GradientPairInt64* __restrict__ d_node_hist,
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const GradientPair* __restrict__ d_gpair,
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GradientQuantiser const rounding) {
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extern __shared__ char smem[];
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const FeatureGroup group = feature_groups[blockIdx.y];
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auto smem_arr = reinterpret_cast<GradientPairInt64*>(smem);
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auto agent = HistogramAgent<kBlockThreads, kItemsPerThread>(
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smem_arr, d_node_hist, group, matrix, d_ridx, rounding, d_gpair);
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if (use_shared_memory_histograms) {
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agent.BuildHistogramWithShared();
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} else {
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agent.BuildHistogramWithGlobal();
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}
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}
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void BuildGradientHistogram(CUDAContext const* ctx, EllpackDeviceAccessor const& matrix,
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FeatureGroupsAccessor const& feature_groups,
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common::Span<GradientPair const> gpair,
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common::Span<const uint32_t> d_ridx,
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common::Span<GradientPairInt64> histogram, GradientQuantiser rounding,
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bool force_global_memory) {
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// decide whether to use shared memory
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int device = 0;
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#if defined(XGBOOST_USE_CUDA)
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dh::safe_cuda(cudaGetDevice(&device));
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#elif defined(XGBOOST_USE_HIP)
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dh::safe_cuda(hipGetDevice(&device));
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#endif
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// opt into maximum shared memory for the kernel if necessary
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#if defined(XGBOOST_USE_CUDA)
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size_t max_shared_memory = dh::MaxSharedMemoryOptin(device);
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#elif defined(XGBOOST_USE_HIP)
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size_t max_shared_memory = dh::MaxSharedMemory(device);
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#endif
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size_t smem_size =
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sizeof(GradientPairInt64) * feature_groups.max_group_bins;
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bool shared = !force_global_memory && smem_size <= max_shared_memory;
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smem_size = shared ? smem_size : 0;
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constexpr int kBlockThreads = 1024;
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constexpr int kItemsPerThread = 8;
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constexpr int kItemsPerTile = kBlockThreads * kItemsPerThread;
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auto runit = [&, kMinItemsPerBlock = kItemsPerTile](auto kernel) {
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if (shared) {
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#if defined(XGBOOST_USE_CUDA)
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dh::safe_cuda(cudaFuncSetAttribute(kernel, cudaFuncAttributeMaxDynamicSharedMemorySize,
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max_shared_memory));
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#elif defined(XGBOOST_USE_HIP) && 0 /* CUDA Only */
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dh::safe_cuda(hipFuncSetAttribute((const void *)kernel, hipFuncAttributeMaxDynamicSharedMemorySize,
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max_shared_memory));
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#endif
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}
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// determine the launch configuration
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int num_groups = feature_groups.NumGroups();
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int n_mps = 0;
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#if defined(XGBOOST_USE_CUDA)
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dh::safe_cuda(cudaDeviceGetAttribute(&n_mps, cudaDevAttrMultiProcessorCount, device));
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int n_blocks_per_mp = 0;
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dh::safe_cuda(cudaOccupancyMaxActiveBlocksPerMultiprocessor(&n_blocks_per_mp, kernel,
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#elif defined(XGBOOST_USE_HIP)
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dh::safe_cuda(hipDeviceGetAttribute(&n_mps, hipDeviceAttributeMultiprocessorCount, device));
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int n_blocks_per_mp = 0;
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dh::safe_cuda(hipOccupancyMaxActiveBlocksPerMultiprocessor(&n_blocks_per_mp, kernel,
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#endif
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kBlockThreads, smem_size));
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// This gives the number of blocks to keep the device occupied
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// Use this as the maximum number of blocks
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unsigned grid_size = n_blocks_per_mp * n_mps;
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// Otherwise launch blocks such that each block has a minimum amount of work to do
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// There are fixed costs to launching each block, e.g. zeroing shared memory
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// The below amount of minimum work was found by experimentation
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int columns_per_group = common::DivRoundUp(matrix.row_stride, feature_groups.NumGroups());
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// Average number of matrix elements processed by each group
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std::size_t items_per_group = d_ridx.size() * columns_per_group;
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// Allocate number of blocks such that each block has about kMinItemsPerBlock work
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// Up to a maximum where the device is saturated
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grid_size = std::min(grid_size, static_cast<std::uint32_t>(
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common::DivRoundUp(items_per_group, kMinItemsPerBlock)));
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dh::LaunchKernel {dim3(grid_size, num_groups), static_cast<uint32_t>(kBlockThreads), smem_size,
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ctx->Stream()} (kernel, matrix, feature_groups, d_ridx, histogram.data(),
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gpair.data(), rounding);
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};
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if (shared) {
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runit(SharedMemHistKernel<true, kBlockThreads, kItemsPerThread>);
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} else {
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runit(SharedMemHistKernel<false, kBlockThreads, kItemsPerThread>);
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}
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#if defined(XGBOOST_USE_CUDA)
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dh::safe_cuda(cudaGetLastError());
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#elif defined(XGBOOST_USE_HIP)
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dh::safe_cuda(hipGetLastError());
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#endif
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}
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} // namespace tree
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} // namespace xgboost
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