4eeeded7d1
* Remove various synchronisations from cuda API calls, instrument monitor with nvtx profiler ranges.
398 lines
15 KiB
Plaintext
398 lines
15 KiB
Plaintext
/*!
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* Copyright 2018 XGBoost contributors
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*/
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#include "./hist_util.h"
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#include <thrust/copy.h>
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#include <thrust/functional.h>
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#include <thrust/iterator/counting_iterator.h>
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#include <thrust/iterator/transform_iterator.h>
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#include <thrust/reduce.h>
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#include <thrust/sequence.h>
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#include <utility>
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#include <vector>
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#include "../tree/param.h"
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#include "./host_device_vector.h"
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#include "./device_helpers.cuh"
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#include "./quantile.h"
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namespace xgboost {
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namespace common {
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using WXQSketch = HistCutMatrix::WXQSketch;
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__global__ void find_cuts_k
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(WXQSketch::Entry* __restrict__ cuts, const bst_float* __restrict__ data,
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const float* __restrict__ cum_weights, int nsamples, int ncuts) {
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// ncuts < nsamples
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int icut = threadIdx.x + blockIdx.x * blockDim.x;
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if (icut >= ncuts)
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return;
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WXQSketch::Entry v;
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int isample = 0;
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if (icut == 0) {
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isample = 0;
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} else if (icut == ncuts - 1) {
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isample = nsamples - 1;
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} else {
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bst_float rank = cum_weights[nsamples - 1] / static_cast<float>(ncuts - 1)
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* static_cast<float>(icut);
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// -1 is used because cum_weights is an inclusive sum
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isample = dh::UpperBound(cum_weights, nsamples, rank);
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isample = max(0, min(isample, nsamples - 1));
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}
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// repeated values will be filtered out on the CPU
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bst_float rmin = isample > 0 ? cum_weights[isample - 1] : 0;
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bst_float rmax = cum_weights[isample];
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cuts[icut] = WXQSketch::Entry(rmin, rmax, rmax - rmin, data[isample]);
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}
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// predictate for thrust filtering that returns true if the element is not a NaN
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struct IsNotNaN {
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__device__ bool operator()(float a) const { return !isnan(a); }
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};
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__global__ void unpack_features_k
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(float* __restrict__ fvalues, float* __restrict__ feature_weights,
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const size_t* __restrict__ row_ptrs, const float* __restrict__ weights,
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Entry* entries, size_t nrows_array, int ncols, size_t row_begin_ptr,
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size_t nrows) {
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size_t irow = threadIdx.x + size_t(blockIdx.x) * blockDim.x;
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if (irow >= nrows) {
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return;
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}
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size_t row_length = row_ptrs[irow + 1] - row_ptrs[irow];
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int icol = threadIdx.y + blockIdx.y * blockDim.y;
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if (icol >= row_length) {
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return;
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}
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Entry entry = entries[row_ptrs[irow] - row_begin_ptr + icol];
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size_t ind = entry.index * nrows_array + irow;
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// if weights are present, ensure that a non-NaN value is written to weights
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// if and only if it is also written to features
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if (!isnan(entry.fvalue) && (weights == nullptr || !isnan(weights[irow]))) {
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fvalues[ind] = entry.fvalue;
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if (feature_weights != nullptr) {
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feature_weights[ind] = weights[irow];
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}
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}
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}
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// finds quantiles on the GPU
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struct GPUSketcher {
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// manage memory for a single GPU
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struct DeviceShard {
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int device_;
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bst_uint row_begin_; // The row offset for this shard
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bst_uint row_end_;
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bst_uint n_rows_;
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int num_cols_{0};
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size_t n_cuts_{0};
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size_t gpu_batch_nrows_{0};
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bool has_weights_{false};
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tree::TrainParam param_;
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std::vector<WXQSketch> sketches_;
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thrust::device_vector<size_t> row_ptrs_;
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std::vector<WXQSketch::SummaryContainer> summaries_;
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thrust::device_vector<Entry> entries_;
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thrust::device_vector<bst_float> fvalues_;
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thrust::device_vector<bst_float> feature_weights_;
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thrust::device_vector<bst_float> fvalues_cur_;
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thrust::device_vector<WXQSketch::Entry> cuts_d_;
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thrust::host_vector<WXQSketch::Entry> cuts_h_;
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thrust::device_vector<bst_float> weights_;
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thrust::device_vector<bst_float> weights2_;
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std::vector<size_t> n_cuts_cur_;
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thrust::device_vector<size_t> num_elements_;
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thrust::device_vector<char> tmp_storage_;
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DeviceShard(int device, bst_uint row_begin, bst_uint row_end,
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tree::TrainParam param) :
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device_(device), row_begin_(row_begin), row_end_(row_end),
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n_rows_(row_end - row_begin), param_(std::move(param)) {
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}
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void Init(const SparsePage& row_batch, const MetaInfo& info, int gpu_batch_nrows) {
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num_cols_ = info.num_col_;
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has_weights_ = info.weights_.Size() > 0;
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// find the batch size
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if (gpu_batch_nrows == 0) {
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// By default, use no more than 1/16th of GPU memory
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gpu_batch_nrows_ = dh::TotalMemory(device_) /
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(16 * num_cols_ * sizeof(Entry));
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} else if (gpu_batch_nrows == -1) {
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gpu_batch_nrows_ = n_rows_;
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} else {
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gpu_batch_nrows_ = gpu_batch_nrows;
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}
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if (gpu_batch_nrows_ > n_rows_) {
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gpu_batch_nrows_ = n_rows_;
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}
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// initialize sketches
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sketches_.resize(num_cols_);
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summaries_.resize(num_cols_);
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constexpr int kFactor = 8;
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double eps = 1.0 / (kFactor * param_.max_bin);
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size_t dummy_nlevel;
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WXQSketch::LimitSizeLevel(row_batch.Size(), eps, &dummy_nlevel, &n_cuts_);
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// double ncuts to be the same as the number of values
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// in the temporary buffers of the sketches
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n_cuts_ *= 2;
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for (int icol = 0; icol < num_cols_; ++icol) {
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sketches_[icol].Init(row_batch.Size(), eps);
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summaries_[icol].Reserve(n_cuts_);
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}
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// allocate necessary GPU buffers
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dh::safe_cuda(cudaSetDevice(device_));
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entries_.resize(gpu_batch_nrows_ * num_cols_);
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fvalues_.resize(gpu_batch_nrows_ * num_cols_);
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fvalues_cur_.resize(gpu_batch_nrows_);
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cuts_d_.resize(n_cuts_ * num_cols_);
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cuts_h_.resize(n_cuts_ * num_cols_);
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weights_.resize(gpu_batch_nrows_);
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weights2_.resize(gpu_batch_nrows_);
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num_elements_.resize(1);
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if (has_weights_) {
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feature_weights_.resize(gpu_batch_nrows_ * num_cols_);
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}
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n_cuts_cur_.resize(num_cols_);
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// allocate storage for CUB algorithms; the size is the maximum of the sizes
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// required for various algorithm
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size_t tmp_size = 0, cur_tmp_size = 0;
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// size for sorting
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if (has_weights_) {
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cub::DeviceRadixSort::SortPairs
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(nullptr, cur_tmp_size, fvalues_cur_.data().get(),
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fvalues_.data().get(), weights_.data().get(), weights2_.data().get(),
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gpu_batch_nrows_);
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} else {
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cub::DeviceRadixSort::SortKeys
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(nullptr, cur_tmp_size, fvalues_cur_.data().get(), fvalues_.data().get(),
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gpu_batch_nrows_);
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}
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tmp_size = std::max(tmp_size, cur_tmp_size);
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// size for inclusive scan
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if (has_weights_) {
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cub::DeviceScan::InclusiveSum
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(nullptr, cur_tmp_size, weights2_.begin(), weights_.begin(), gpu_batch_nrows_);
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tmp_size = std::max(tmp_size, cur_tmp_size);
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}
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// size for reduction by key
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cub::DeviceReduce::ReduceByKey
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(nullptr, cur_tmp_size, fvalues_.begin(),
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fvalues_cur_.begin(), weights_.begin(), weights2_.begin(),
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num_elements_.begin(), thrust::maximum<bst_float>(), gpu_batch_nrows_);
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tmp_size = std::max(tmp_size, cur_tmp_size);
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// size for filtering
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cub::DeviceSelect::If
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(nullptr, cur_tmp_size, fvalues_.begin(), fvalues_cur_.begin(),
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num_elements_.begin(), gpu_batch_nrows_, IsNotNaN());
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tmp_size = std::max(tmp_size, cur_tmp_size);
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tmp_storage_.resize(tmp_size);
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}
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void FindColumnCuts(size_t batch_nrows, size_t icol) {
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size_t tmp_size = tmp_storage_.size();
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// filter out NaNs in feature values
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auto fvalues_begin = fvalues_.data() + icol * gpu_batch_nrows_;
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cub::DeviceSelect::If
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(tmp_storage_.data().get(), tmp_size, fvalues_begin,
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fvalues_cur_.data(), num_elements_.begin(), batch_nrows, IsNotNaN());
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size_t nfvalues_cur = 0;
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thrust::copy_n(num_elements_.begin(), 1, &nfvalues_cur);
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// compute cumulative weights using a prefix scan
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if (has_weights_) {
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// filter out NaNs in weights;
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// since cub::DeviceSelect::If performs stable filtering,
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// the weights are stored in the correct positions
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auto feature_weights_begin = feature_weights_.data() +
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icol * gpu_batch_nrows_;
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cub::DeviceSelect::If
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(tmp_storage_.data().get(), tmp_size, feature_weights_begin,
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weights_.data().get(), num_elements_.begin(), batch_nrows, IsNotNaN());
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// sort the values and weights
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cub::DeviceRadixSort::SortPairs
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(tmp_storage_.data().get(), tmp_size, fvalues_cur_.data().get(),
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fvalues_begin.get(), weights_.data().get(), weights2_.data().get(),
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nfvalues_cur);
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// sum the weights to get cumulative weight values
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cub::DeviceScan::InclusiveSum
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(tmp_storage_.data().get(), tmp_size, weights2_.begin(),
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weights_.begin(), nfvalues_cur);
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} else {
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// sort the batch values
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cub::DeviceRadixSort::SortKeys
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(tmp_storage_.data().get(), tmp_size,
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fvalues_cur_.data().get(), fvalues_begin.get(), nfvalues_cur);
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// fill in cumulative weights with counting iterator
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thrust::copy_n(thrust::make_counting_iterator(1), nfvalues_cur,
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weights_.begin());
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}
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// remove repeated items and sum the weights across them;
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// non-negative weights are assumed
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cub::DeviceReduce::ReduceByKey
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(tmp_storage_.data().get(), tmp_size, fvalues_begin,
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fvalues_cur_.begin(), weights_.begin(), weights2_.begin(),
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num_elements_.begin(), thrust::maximum<bst_float>(), nfvalues_cur);
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size_t n_unique = 0;
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thrust::copy_n(num_elements_.begin(), 1, &n_unique);
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// extract cuts
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n_cuts_cur_[icol] = std::min(n_cuts_, n_unique);
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// if less elements than cuts: copy all elements with their weights
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if (n_cuts_ > n_unique) {
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float* weights2_ptr = weights2_.data().get();
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float* fvalues_ptr = fvalues_cur_.data().get();
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WXQSketch::Entry* cuts_ptr = cuts_d_.data().get() + icol * n_cuts_;
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dh::LaunchN(device_, n_unique, [=]__device__(size_t i) {
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bst_float rmax = weights2_ptr[i];
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bst_float rmin = i > 0 ? weights2_ptr[i - 1] : 0;
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cuts_ptr[i] = WXQSketch::Entry(rmin, rmax, rmax - rmin, fvalues_ptr[i]);
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});
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} else if (n_cuts_cur_[icol] > 0) {
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// if more elements than cuts: use binary search on cumulative weights
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int block = 256;
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find_cuts_k<<<dh::DivRoundUp(n_cuts_cur_[icol], block), block>>>
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(cuts_d_.data().get() + icol * n_cuts_, fvalues_cur_.data().get(),
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weights2_.data().get(), n_unique, n_cuts_cur_[icol]);
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dh::safe_cuda(cudaGetLastError()); // NOLINT
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}
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}
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void SketchBatch(const SparsePage& row_batch, const MetaInfo& info,
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size_t gpu_batch) {
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// compute start and end indices
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size_t batch_row_begin = gpu_batch * gpu_batch_nrows_;
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size_t batch_row_end = std::min((gpu_batch + 1) * gpu_batch_nrows_,
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static_cast<size_t>(n_rows_));
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size_t batch_nrows = batch_row_end - batch_row_begin;
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const auto& offset_vec = row_batch.offset.HostVector();
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const auto& data_vec = row_batch.data.HostVector();
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size_t n_entries = offset_vec[row_begin_ + batch_row_end] -
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offset_vec[row_begin_ + batch_row_begin];
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// copy the batch to the GPU
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dh::safe_cuda
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(cudaMemcpyAsync(entries_.data().get(),
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data_vec.data() + offset_vec[row_begin_ + batch_row_begin],
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n_entries * sizeof(Entry), cudaMemcpyDefault));
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// copy the weights if necessary
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if (has_weights_) {
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const auto& weights_vec = info.weights_.HostVector();
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dh::safe_cuda
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(cudaMemcpyAsync(weights_.data().get(),
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weights_vec.data() + row_begin_ + batch_row_begin,
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batch_nrows * sizeof(bst_float), cudaMemcpyDefault));
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}
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// unpack the features; also unpack weights if present
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thrust::fill(fvalues_.begin(), fvalues_.end(), NAN);
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thrust::fill(feature_weights_.begin(), feature_weights_.end(), NAN);
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dim3 block3(64, 4, 1);
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dim3 grid3(dh::DivRoundUp(batch_nrows, block3.x),
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dh::DivRoundUp(num_cols_, block3.y), 1);
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unpack_features_k<<<grid3, block3>>>
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(fvalues_.data().get(), has_weights_ ? feature_weights_.data().get() : nullptr,
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row_ptrs_.data().get() + batch_row_begin,
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has_weights_ ? weights_.data().get() : nullptr, entries_.data().get(),
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gpu_batch_nrows_, num_cols_,
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offset_vec[row_begin_ + batch_row_begin], batch_nrows);
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for (int icol = 0; icol < num_cols_; ++icol) {
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FindColumnCuts(batch_nrows, icol);
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}
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// add cuts into sketches
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thrust::copy(cuts_d_.begin(), cuts_d_.end(), cuts_h_.begin());
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for (int icol = 0; icol < num_cols_; ++icol) {
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summaries_[icol].MakeFromSorted(&cuts_h_[n_cuts_ * icol], n_cuts_cur_[icol]);
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sketches_[icol].PushSummary(summaries_[icol]);
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}
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}
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void Sketch(const SparsePage& row_batch, const MetaInfo& info) {
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// copy rows to the device
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dh::safe_cuda(cudaSetDevice(device_));
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const auto& offset_vec = row_batch.offset.HostVector();
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row_ptrs_.resize(n_rows_ + 1);
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thrust::copy(offset_vec.data() + row_begin_,
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offset_vec.data() + row_end_ + 1, row_ptrs_.begin());
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size_t gpu_nbatches = dh::DivRoundUp(n_rows_, gpu_batch_nrows_);
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for (size_t gpu_batch = 0; gpu_batch < gpu_nbatches; ++gpu_batch) {
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SketchBatch(row_batch, info, gpu_batch);
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}
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}
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};
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void Sketch(const SparsePage& batch, const MetaInfo& info,
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HistCutMatrix* hmat, int gpu_batch_nrows) {
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// create device shards
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shards_.resize(dist_.Devices().Size());
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dh::ExecuteIndexShards(&shards_, [&](int i, std::unique_ptr<DeviceShard>& shard) {
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size_t start = dist_.ShardStart(info.num_row_, i);
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size_t size = dist_.ShardSize(info.num_row_, i);
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shard = std::unique_ptr<DeviceShard>(
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new DeviceShard(dist_.Devices().DeviceId(i),
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start, start + size, param_));
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});
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// compute sketches for each shard
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dh::ExecuteIndexShards(&shards_,
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[&](int idx, std::unique_ptr<DeviceShard>& shard) {
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shard->Init(batch, info, gpu_batch_nrows);
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shard->Sketch(batch, info);
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});
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// merge the sketches from all shards
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// TODO(canonizer): do it in a tree-like reduction
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int num_cols = info.num_col_;
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std::vector<WXQSketch> sketches(num_cols);
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WXQSketch::SummaryContainer summary;
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for (int icol = 0; icol < num_cols; ++icol) {
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sketches[icol].Init(batch.Size(), 1.0 / (8 * param_.max_bin));
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for (int shard = 0; shard < shards_.size(); ++shard) {
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shards_[shard]->sketches_[icol].GetSummary(&summary);
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sketches[icol].PushSummary(summary);
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}
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}
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hmat->Init(&sketches, param_.max_bin);
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}
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GPUSketcher(tree::TrainParam param, size_t n_rows) : param_(std::move(param)) {
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dist_ = GPUDistribution::Block(GPUSet::All(param_.gpu_id, param_.n_gpus, n_rows));
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}
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std::vector<std::unique_ptr<DeviceShard>> shards_;
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tree::TrainParam param_;
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GPUDistribution dist_;
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};
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void DeviceSketch
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(const SparsePage& batch, const MetaInfo& info,
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const tree::TrainParam& param, HistCutMatrix* hmat, int gpu_batch_nrows) {
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GPUSketcher sketcher(param, info.num_row_);
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sketcher.Sketch(batch, info, hmat, gpu_batch_nrows);
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}
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} // namespace common
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} // namespace xgboost
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