* Fatal error if GPU algorithm selected without GPU support compiled * Resolve type conversion warnings * Fix gpu unit test failure * Fix compressed iterator edge case * Fix python unit test failures due to flake8 update on pip
1049 lines
38 KiB
Plaintext
1049 lines
38 KiB
Plaintext
/*!
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* Copyright 2017 XGBoost contributors
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*/
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#include <xgboost/tree_updater.h>
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#include <memory>
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#include <utility>
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#include <vector>
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#include "../common/compressed_iterator.h"
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#include "../common/device_helpers.cuh"
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#include "../common/hist_util.h"
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#include "param.h"
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#include "updater_gpu_common.cuh"
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namespace xgboost {
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namespace tree {
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DMLC_REGISTRY_FILE_TAG(updater_gpu_hist);
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typedef bst_gpair_integer gpair_sum_t;
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static const ncclDataType_t nccl_sum_t = ncclInt64;
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// Helper for explicit template specialisation
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template <int N>
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struct Int {};
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struct DeviceGMat {
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dh::dvec<common::compressed_byte_t> gidx_buffer;
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common::CompressedIterator<uint32_t> gidx;
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dh::dvec<size_t> row_ptr;
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void Init(int device_idx, const common::GHistIndexMatrix& gmat,
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bst_ulong element_begin, bst_ulong element_end, bst_ulong row_begin,
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bst_ulong row_end, int n_bins) {
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dh::safe_cuda(cudaSetDevice(device_idx));
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CHECK(gidx_buffer.size()) << "gidx_buffer must be externally allocated";
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CHECK_EQ(row_ptr.size(), (row_end - row_begin) + 1)
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<< "row_ptr must be externally allocated";
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common::CompressedBufferWriter cbw(n_bins);
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std::vector<common::compressed_byte_t> host_buffer(gidx_buffer.size());
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cbw.Write(host_buffer.data(), gmat.index.begin() + element_begin,
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gmat.index.begin() + element_end);
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gidx_buffer = host_buffer;
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gidx = common::CompressedIterator<uint32_t>(gidx_buffer.data(), n_bins);
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// row_ptr
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dh::safe_cuda(cudaMemcpy(row_ptr.data(), gmat.row_ptr.data() + row_begin,
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row_ptr.size() * sizeof(size_t),
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cudaMemcpyHostToDevice));
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// normalise row_ptr
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size_t start = gmat.row_ptr[row_begin];
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auto d_row_ptr = row_ptr.data();
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dh::launch_n(row_ptr.device_idx(), row_ptr.size(),
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[=] __device__(size_t idx) { d_row_ptr[idx] -= start; });
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}
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};
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struct HistHelper {
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gpair_sum_t* d_hist;
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int n_bins;
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__host__ __device__ HistHelper(gpair_sum_t* ptr, int n_bins)
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: d_hist(ptr), n_bins(n_bins) {}
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__device__ void Add(bst_gpair gpair, int gidx, int nidx) const {
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int hist_idx = nidx * n_bins + gidx;
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auto dst_ptr =
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reinterpret_cast<unsigned long long int*>(&d_hist[hist_idx]); // NOLINT
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gpair_sum_t tmp(gpair.GetGrad(), gpair.GetHess());
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auto src_ptr = reinterpret_cast<gpair_sum_t::value_t*>(&tmp);
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atomicAdd(dst_ptr,
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static_cast<unsigned long long int>(*src_ptr)); // NOLINT
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atomicAdd(dst_ptr + 1,
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static_cast<unsigned long long int>(*(src_ptr + 1))); // NOLINT
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}
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__device__ gpair_sum_t Get(int gidx, int nidx) const {
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return d_hist[nidx * n_bins + gidx];
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}
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};
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struct DeviceHist {
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int n_bins;
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dh::dvec<gpair_sum_t> data;
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void Init(int n_bins_in) {
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this->n_bins = n_bins_in;
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CHECK(!data.empty()) << "DeviceHist must be externally allocated";
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}
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void Reset(int device_idx) {
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cudaSetDevice(device_idx);
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data.fill(gpair_sum_t());
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}
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HistHelper GetBuilder() { return HistHelper(data.data(), n_bins); }
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gpair_sum_t* GetLevelPtr(int depth) {
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return data.data() + n_nodes(depth - 1) * n_bins;
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}
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int LevelSize(int depth) { return n_bins * n_nodes_level(depth); }
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};
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template <int BLOCK_THREADS>
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__global__ void find_split_kernel(
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const gpair_sum_t* d_level_hist, int* d_feature_segments, int depth,
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uint64_t n_features, int n_bins, DeviceNodeStats* d_nodes,
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int nodes_offset_device, float* d_fidx_min_map, float* d_gidx_fvalue_map,
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GPUTrainingParam gpu_param, bool* d_left_child_smallest_temp,
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bool colsample, int* d_feature_flags) {
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typedef cub::KeyValuePair<int, float> ArgMaxT;
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typedef cub::BlockScan<gpair_sum_t, BLOCK_THREADS, cub::BLOCK_SCAN_WARP_SCANS>
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BlockScanT;
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typedef cub::BlockReduce<ArgMaxT, BLOCK_THREADS> MaxReduceT;
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typedef cub::BlockReduce<gpair_sum_t, BLOCK_THREADS> SumReduceT;
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union TempStorage {
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typename BlockScanT::TempStorage scan;
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typename MaxReduceT::TempStorage max_reduce;
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typename SumReduceT::TempStorage sum_reduce;
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};
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__shared__ cub::Uninitialized<DeviceSplitCandidate> uninitialized_split;
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DeviceSplitCandidate& split = uninitialized_split.Alias();
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__shared__ cub::Uninitialized<gpair_sum_t> uninitialized_sum;
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gpair_sum_t& shared_sum = uninitialized_sum.Alias();
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__shared__ ArgMaxT block_max;
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__shared__ TempStorage temp_storage;
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if (threadIdx.x == 0) {
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split = DeviceSplitCandidate();
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}
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__syncthreads();
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// below two are for accessing full-sized node list stored on each device
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// always one block per node, BLOCK_THREADS threads per block
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int level_node_idx = blockIdx.x + nodes_offset_device;
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int node_idx = n_nodes(depth - 1) + level_node_idx;
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for (int fidx = 0; fidx < n_features; fidx++) {
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if (colsample && d_feature_flags[fidx] == 0) continue;
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int begin = d_feature_segments[level_node_idx * n_features + fidx];
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int end = d_feature_segments[level_node_idx * n_features + fidx + 1];
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gpair_sum_t feature_sum = gpair_sum_t();
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for (int reduce_begin = begin; reduce_begin < end;
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reduce_begin += BLOCK_THREADS) {
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bool thread_active = reduce_begin + threadIdx.x < end;
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// Scan histogram
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gpair_sum_t bin = thread_active ? d_level_hist[reduce_begin + threadIdx.x]
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: gpair_sum_t();
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feature_sum +=
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SumReduceT(temp_storage.sum_reduce).Reduce(bin, cub::Sum());
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}
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if (threadIdx.x == 0) {
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shared_sum = feature_sum;
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}
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// __syncthreads(); // no need to synch because below there is a Scan
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auto prefix_op = SumCallbackOp<gpair_sum_t>();
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for (int scan_begin = begin; scan_begin < end;
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scan_begin += BLOCK_THREADS) {
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bool thread_active = scan_begin + threadIdx.x < end;
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gpair_sum_t bin = thread_active ? d_level_hist[scan_begin + threadIdx.x]
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: gpair_sum_t();
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BlockScanT(temp_storage.scan)
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.ExclusiveScan(bin, bin, cub::Sum(), prefix_op);
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// Calculate gain
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gpair_sum_t parent_sum = gpair_sum_t(d_nodes[node_idx].sum_gradients);
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float parent_gain = d_nodes[node_idx].root_gain;
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gpair_sum_t missing = parent_sum - shared_sum;
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bool missing_left;
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float gain = thread_active
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? loss_chg_missing(bin, missing, parent_sum, parent_gain,
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gpu_param, missing_left)
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: -FLT_MAX;
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__syncthreads();
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// Find thread with best gain
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ArgMaxT tuple(threadIdx.x, gain);
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ArgMaxT best =
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MaxReduceT(temp_storage.max_reduce).Reduce(tuple, cub::ArgMax());
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if (threadIdx.x == 0) {
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block_max = best;
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}
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__syncthreads();
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// Best thread updates split
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if (threadIdx.x == block_max.key) {
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float fvalue;
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int gidx = (scan_begin - (level_node_idx * n_bins)) + threadIdx.x;
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if (threadIdx.x == 0 &&
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begin == scan_begin) { // check at start of first tile
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fvalue = d_fidx_min_map[fidx];
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} else {
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fvalue = d_gidx_fvalue_map[gidx - 1];
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}
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gpair_sum_t left = missing_left ? bin + missing : bin;
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gpair_sum_t right = parent_sum - left;
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split.Update(gain, missing_left ? LeftDir : RightDir, fvalue, fidx,
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left, right, gpu_param);
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}
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__syncthreads();
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} // end scan
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} // end over features
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// Create node
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if (threadIdx.x == 0 && split.IsValid()) {
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d_nodes[node_idx].SetSplit(split);
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DeviceNodeStats& left_child = d_nodes[left_child_nidx(node_idx)];
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DeviceNodeStats& right_child = d_nodes[right_child_nidx(node_idx)];
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bool& left_child_smallest = d_left_child_smallest_temp[node_idx];
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left_child =
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DeviceNodeStats(split.left_sum, left_child_nidx(node_idx), gpu_param);
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right_child =
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DeviceNodeStats(split.right_sum, right_child_nidx(node_idx), gpu_param);
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// Record smallest node
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if (split.left_sum.GetHess() <= split.right_sum.GetHess()) {
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left_child_smallest = true;
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} else {
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left_child_smallest = false;
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}
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}
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}
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class GPUHistMaker : public TreeUpdater {
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public:
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GPUHistMaker()
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: initialised(false),
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is_dense(false),
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p_last_fmat_(nullptr),
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prediction_cache_initialised(false) {}
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~GPUHistMaker() {
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if (initialised) {
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for (int d_idx = 0; d_idx < n_devices; ++d_idx) {
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ncclCommDestroy(comms[d_idx]);
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dh::safe_cuda(cudaSetDevice(dList[d_idx]));
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dh::safe_cuda(cudaStreamDestroy(*(streams[d_idx])));
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}
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for (int num_d = 1; num_d <= n_devices;
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++num_d) { // loop over number of devices used
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for (int d_idx = 0; d_idx < n_devices; ++d_idx) {
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ncclCommDestroy(find_split_comms[num_d - 1][d_idx]);
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}
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}
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}
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}
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void Init(
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const std::vector<std::pair<std::string, std::string>>& args) override {
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param.InitAllowUnknown(args);
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CHECK(param.max_depth < 16) << "Tree depth too large.";
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CHECK(param.max_depth != 0) << "Tree depth cannot be 0.";
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CHECK(param.grow_policy != TrainParam::kLossGuide)
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<< "Loss guided growth policy not supported. Use CPU algorithm.";
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this->param = param;
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CHECK(param.n_gpus != 0) << "Must have at least one device";
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}
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void Update(const std::vector<bst_gpair>& gpair, DMatrix* dmat,
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const std::vector<RegTree*>& trees) override {
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GradStats::CheckInfo(dmat->info());
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// rescale learning rate according to size of trees
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float lr = param.learning_rate;
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param.learning_rate = lr / trees.size();
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// build tree
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try {
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for (size_t i = 0; i < trees.size(); ++i) {
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this->UpdateTree(gpair, dmat, trees[i]);
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}
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} catch (const std::exception& e) {
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LOG(FATAL) << "GPU plugin exception: " << e.what() << std::endl;
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}
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param.learning_rate = lr;
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}
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void InitData(const std::vector<bst_gpair>& gpair, DMatrix& fmat, // NOLINT
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const RegTree& tree) {
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dh::Timer time1;
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// set member num_rows and n_devices for rest of GPUHistBuilder members
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info = &fmat.info();
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CHECK(info->num_row < std::numeric_limits<bst_uint>::max());
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num_rows = static_cast<bst_uint>(info->num_row);
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n_devices = dh::n_devices(param.n_gpus, num_rows);
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if (!initialised) {
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// reset static timers used across iterations
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cpu_init_time = 0;
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gpu_init_time = 0;
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cpu_time.Reset();
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gpu_time = 0;
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// set dList member
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dList.resize(n_devices);
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for (int d_idx = 0; d_idx < n_devices; ++d_idx) {
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int device_idx = (param.gpu_id + d_idx) % dh::n_visible_devices();
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dList[d_idx] = device_idx;
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}
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// initialize nccl
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comms.resize(n_devices);
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streams.resize(n_devices);
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dh::safe_nccl(ncclCommInitAll(comms.data(), n_devices,
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dList.data())); // initialize communicator
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// (One communicator per
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// process)
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// printf("# NCCL: Using devices\n");
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for (int d_idx = 0; d_idx < n_devices; ++d_idx) {
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streams[d_idx] =
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reinterpret_cast<cudaStream_t*>(malloc(sizeof(cudaStream_t)));
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dh::safe_cuda(cudaSetDevice(dList[d_idx]));
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dh::safe_cuda(cudaStreamCreate(streams[d_idx]));
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int cudaDev;
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int rank;
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cudaDeviceProp prop;
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dh::safe_nccl(ncclCommCuDevice(comms[d_idx], &cudaDev));
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dh::safe_nccl(ncclCommUserRank(comms[d_idx], &rank));
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dh::safe_cuda(cudaGetDeviceProperties(&prop, cudaDev));
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// printf("# Rank %2d uses device %2d [0x%02x] %s\n", rank, cudaDev,
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// prop.pciBusID, prop.name);
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// cudaDriverGetVersion(&driverVersion);
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// cudaRuntimeGetVersion(&runtimeVersion);
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std::ostringstream oss;
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oss << "CUDA Capability Major/Minor version number: " << prop.major
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<< "." << prop.minor << " is insufficient. Need >=3.5.";
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int failed = prop.major < 3 || prop.major == 3 && prop.minor < 5;
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CHECK(failed == 0) << oss.str();
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}
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// local find_split group of comms for each case of reduced number of
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// GPUs to use
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find_split_comms.resize(
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n_devices,
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std::vector<ncclComm_t>(n_devices)); // TODO(JCM): Excessive, but
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// ok, and best to do
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// here instead of
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// repeatedly
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for (int num_d = 1; num_d <= n_devices;
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++num_d) { // loop over number of devices used
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dh::safe_nccl(
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ncclCommInitAll(find_split_comms[num_d - 1].data(), num_d,
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dList.data())); // initialize communicator
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// (One communicator per
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// process)
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}
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is_dense = info->num_nonzero == info->num_col * info->num_row;
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dh::Timer time0;
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hmat_.Init(&fmat, param.max_bin);
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cpu_init_time += time0.ElapsedSeconds();
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if (param.debug_verbose) { // Only done once for each training session
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LOG(CONSOLE) << "[GPU Plug-in] CPU Time for hmat_.Init "
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<< time0.ElapsedSeconds() << " sec";
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fflush(stdout);
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}
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time0.Reset();
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gmat_.cut = &hmat_;
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cpu_init_time += time0.ElapsedSeconds();
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if (param.debug_verbose) { // Only done once for each training session
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LOG(CONSOLE) << "[GPU Plug-in] CPU Time for gmat_.cut "
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<< time0.ElapsedSeconds() << " sec";
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fflush(stdout);
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}
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time0.Reset();
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gmat_.Init(&fmat);
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cpu_init_time += time0.ElapsedSeconds();
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if (param.debug_verbose) { // Only done once for each training session
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LOG(CONSOLE) << "[GPU Plug-in] CPU Time for gmat_.Init() "
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<< time0.ElapsedSeconds() << " sec";
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fflush(stdout);
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}
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time0.Reset();
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if (param.debug_verbose) { // Only done once for each training session
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LOG(CONSOLE)
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<< "[GPU Plug-in] CPU Time for hmat_.Init, gmat_.cut, gmat_.Init "
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<< cpu_init_time << " sec";
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fflush(stdout);
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}
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int n_bins = static_cast<int >(hmat_.row_ptr.back());
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int n_features = static_cast<int >(hmat_.row_ptr.size() - 1);
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// deliniate data onto multiple gpus
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device_row_segments.push_back(0);
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device_element_segments.push_back(0);
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bst_uint offset = 0;
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bst_uint shard_size = static_cast<bst_uint>(
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std::ceil(static_cast<double>(num_rows) / n_devices));
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for (int d_idx = 0; d_idx < n_devices; d_idx++) {
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int device_idx = dList[d_idx];
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offset += shard_size;
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offset = std::min(offset, num_rows);
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device_row_segments.push_back(offset);
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device_element_segments.push_back(gmat_.row_ptr[offset]);
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}
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// Build feature segments
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std::vector<int> h_feature_segments;
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for (int node = 0; node < n_nodes_level(param.max_depth - 1); node++) {
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for (int fidx = 0; fidx < n_features; fidx++) {
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h_feature_segments.push_back(hmat_.row_ptr[fidx] + node * n_bins);
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}
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}
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h_feature_segments.push_back(n_nodes_level(param.max_depth - 1) * n_bins);
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// Construct feature map
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std::vector<int> h_gidx_feature_map(n_bins);
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for (int fidx = 0; fidx < n_features; fidx++) {
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for (auto i = hmat_.row_ptr[fidx]; i < hmat_.row_ptr[fidx + 1]; i++) {
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h_gidx_feature_map[i] = fidx;
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}
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}
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int level_max_bins = n_nodes_level(param.max_depth - 1) * n_bins;
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// allocate unique common data that reside on master device (NOTE: None
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// currently)
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// int master_device=dList[0];
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// ba.allocate(master_device, );
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// allocate vectors across all devices
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temp_memory.resize(n_devices);
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hist_vec.resize(n_devices);
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nodes.resize(n_devices);
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nodes_temp.resize(n_devices);
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nodes_child_temp.resize(n_devices);
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left_child_smallest.resize(n_devices);
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left_child_smallest_temp.resize(n_devices);
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feature_flags.resize(n_devices);
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|
fidx_min_map.resize(n_devices);
|
|
feature_segments.resize(n_devices);
|
|
prediction_cache.resize(n_devices);
|
|
position.resize(n_devices);
|
|
position_tmp.resize(n_devices);
|
|
device_matrix.resize(n_devices);
|
|
device_gpair.resize(n_devices);
|
|
gidx_feature_map.resize(n_devices);
|
|
gidx_fvalue_map.resize(n_devices);
|
|
|
|
int find_split_n_devices = static_cast<int >(std::pow(2, std::floor(std::log2(n_devices))));
|
|
find_split_n_devices =
|
|
std::min(n_nodes_level(param.max_depth), find_split_n_devices);
|
|
int max_num_nodes_device =
|
|
n_nodes_level(param.max_depth) / find_split_n_devices;
|
|
|
|
// num_rows_segment: for sharding rows onto gpus for splitting data
|
|
// num_elements_segment: for sharding rows (of elements) onto gpus for
|
|
// splitting data
|
|
// max_num_nodes_device: for sharding nodes onto gpus for split finding
|
|
// All other variables have full copy on gpu, with copy either being
|
|
// identical or just current portion (like for histogram) before
|
|
// AllReduce
|
|
for (int d_idx = 0; d_idx < n_devices; d_idx++) {
|
|
int device_idx = dList[d_idx];
|
|
bst_uint num_rows_segment =
|
|
device_row_segments[d_idx + 1] - device_row_segments[d_idx];
|
|
bst_ulong num_elements_segment =
|
|
device_element_segments[d_idx + 1] - device_element_segments[d_idx];
|
|
ba.allocate(
|
|
device_idx, param.silent, &(hist_vec[d_idx].data),
|
|
n_nodes(param.max_depth - 1) * n_bins, &nodes[d_idx],
|
|
n_nodes(param.max_depth), &nodes_temp[d_idx], max_num_nodes_device,
|
|
&nodes_child_temp[d_idx], max_num_nodes_device,
|
|
&left_child_smallest[d_idx], n_nodes(param.max_depth),
|
|
&left_child_smallest_temp[d_idx], max_num_nodes_device,
|
|
&feature_flags[d_idx],
|
|
n_features, // may change but same on all devices
|
|
&fidx_min_map[d_idx],
|
|
hmat_.min_val.size(), // constant and same on all devices
|
|
&feature_segments[d_idx],
|
|
h_feature_segments.size(), // constant and same on all devices
|
|
&prediction_cache[d_idx], num_rows_segment, &position[d_idx],
|
|
num_rows_segment, &position_tmp[d_idx], num_rows_segment,
|
|
&device_gpair[d_idx], num_rows_segment,
|
|
&device_matrix[d_idx].gidx_buffer,
|
|
common::CompressedBufferWriter::CalculateBufferSize(
|
|
num_elements_segment,
|
|
n_bins), // constant and same on all devices
|
|
&device_matrix[d_idx].row_ptr, num_rows_segment + 1,
|
|
&gidx_feature_map[d_idx],
|
|
n_bins, // constant and same on all devices
|
|
&gidx_fvalue_map[d_idx],
|
|
hmat_.cut.size()); // constant and same on all devices
|
|
|
|
// Copy Host to Device (assumes comes after ba.allocate that sets
|
|
// device)
|
|
device_matrix[d_idx].Init(
|
|
device_idx, gmat_, device_element_segments[d_idx],
|
|
device_element_segments[d_idx + 1], device_row_segments[d_idx],
|
|
device_row_segments[d_idx + 1], n_bins);
|
|
gidx_feature_map[d_idx] = h_gidx_feature_map;
|
|
gidx_fvalue_map[d_idx] = hmat_.cut;
|
|
feature_segments[d_idx] = h_feature_segments;
|
|
fidx_min_map[d_idx] = hmat_.min_val;
|
|
|
|
// Initialize, no copy
|
|
hist_vec[d_idx].Init(n_bins); // init host object
|
|
prediction_cache[d_idx].fill(0); // init device object (assumes comes
|
|
// after ba.allocate that sets device)
|
|
feature_flags[d_idx].fill(
|
|
1); // init device object (assumes comes after
|
|
// ba.allocate that sets device)
|
|
}
|
|
}
|
|
|
|
// copy or init to do every iteration
|
|
for (int d_idx = 0; d_idx < n_devices; d_idx++) {
|
|
int device_idx = dList[d_idx];
|
|
dh::safe_cuda(cudaSetDevice(device_idx));
|
|
|
|
nodes[d_idx].fill(DeviceNodeStats());
|
|
nodes_temp[d_idx].fill(DeviceNodeStats());
|
|
nodes_child_temp[d_idx].fill(DeviceNodeStats());
|
|
|
|
position[d_idx].fill(0);
|
|
|
|
device_gpair[d_idx].copy(gpair.begin() + device_row_segments[d_idx],
|
|
gpair.begin() + device_row_segments[d_idx + 1]);
|
|
|
|
subsample_gpair(&device_gpair[d_idx], param.subsample,
|
|
device_row_segments[d_idx]);
|
|
|
|
hist_vec[d_idx].Reset(device_idx);
|
|
|
|
// left_child_smallest and left_child_smallest_temp don't need to be
|
|
// initialized
|
|
}
|
|
|
|
dh::synchronize_n_devices(n_devices, dList);
|
|
|
|
if (!initialised) {
|
|
gpu_init_time = time1.ElapsedSeconds() - cpu_init_time;
|
|
gpu_time = -cpu_init_time;
|
|
if (param.debug_verbose) { // Only done once for each training session
|
|
LOG(CONSOLE) << "[GPU Plug-in] Time for GPU operations during First "
|
|
"Call to InitData() "
|
|
<< gpu_init_time << " sec";
|
|
fflush(stdout);
|
|
}
|
|
}
|
|
|
|
p_last_fmat_ = &fmat;
|
|
|
|
initialised = true;
|
|
}
|
|
|
|
void BuildHist(int depth) {
|
|
for (int d_idx = 0; d_idx < n_devices; d_idx++) {
|
|
int device_idx = dList[d_idx];
|
|
size_t begin = device_element_segments[d_idx];
|
|
size_t end = device_element_segments[d_idx + 1];
|
|
size_t row_begin = device_row_segments[d_idx];
|
|
size_t row_end = device_row_segments[d_idx + 1];
|
|
|
|
auto d_gidx = device_matrix[d_idx].gidx;
|
|
auto d_row_ptr = device_matrix[d_idx].row_ptr.tbegin();
|
|
auto d_position = position[d_idx].data();
|
|
auto d_gpair = device_gpair[d_idx].data();
|
|
auto d_left_child_smallest = left_child_smallest[d_idx].data();
|
|
auto hist_builder = hist_vec[d_idx].GetBuilder();
|
|
dh::TransformLbs(
|
|
device_idx, &temp_memory[d_idx], end - begin, d_row_ptr,
|
|
row_end - row_begin, is_dense,
|
|
[=] __device__(size_t local_idx, int local_ridx) {
|
|
int nidx = d_position[local_ridx]; // OPTMARK: latency
|
|
if (!is_active(nidx, depth)) return;
|
|
|
|
// Only increment smallest node
|
|
bool is_smallest = (d_left_child_smallest[parent_nidx(nidx)] &&
|
|
is_left_child(nidx)) ||
|
|
(!d_left_child_smallest[parent_nidx(nidx)] &&
|
|
!is_left_child(nidx));
|
|
if (!is_smallest && depth > 0) return;
|
|
|
|
int gidx = d_gidx[local_idx];
|
|
bst_gpair gpair = d_gpair[local_ridx];
|
|
|
|
hist_builder.Add(gpair, gidx,
|
|
nidx); // OPTMARK: This is slow, could use
|
|
// shared memory or cache results
|
|
// intead of writing to global
|
|
// memory every time in atomic way.
|
|
});
|
|
}
|
|
|
|
dh::synchronize_n_devices(n_devices, dList);
|
|
|
|
// time.printElapsed("Add Time");
|
|
|
|
// (in-place) reduce each element of histogram (for only current level)
|
|
// across multiple gpus
|
|
// TODO(JCM): use out of place with pre-allocated buffer, but then have to
|
|
// copy
|
|
// back on device
|
|
// fprintf(stderr,"sizeof(bst_gpair)/sizeof(float)=%d\n",sizeof(bst_gpair)/sizeof(float));
|
|
for (int d_idx = 0; d_idx < n_devices; d_idx++) {
|
|
int device_idx = dList[d_idx];
|
|
dh::safe_cuda(cudaSetDevice(device_idx));
|
|
dh::safe_nccl(ncclAllReduce(
|
|
reinterpret_cast<const void*>(hist_vec[d_idx].GetLevelPtr(depth)),
|
|
reinterpret_cast<void*>(hist_vec[d_idx].GetLevelPtr(depth)),
|
|
hist_vec[d_idx].LevelSize(depth) * sizeof(gpair_sum_t) /
|
|
sizeof(gpair_sum_t::value_t),
|
|
nccl_sum_t, ncclSum, comms[d_idx], *(streams[d_idx])));
|
|
}
|
|
|
|
for (int d_idx = 0; d_idx < n_devices; d_idx++) {
|
|
int device_idx = dList[d_idx];
|
|
dh::safe_cuda(cudaSetDevice(device_idx));
|
|
dh::safe_cuda(cudaStreamSynchronize(*(streams[d_idx])));
|
|
}
|
|
// if no NCCL, then presume only 1 GPU, then already correct
|
|
|
|
// time.printElapsed("Reduce-Add Time");
|
|
|
|
// Subtraction trick (applied to all devices in same way -- to avoid doing
|
|
// on master and then Bcast)
|
|
if (depth > 0) {
|
|
for (int d_idx = 0; d_idx < n_devices; d_idx++) {
|
|
int device_idx = dList[d_idx];
|
|
dh::safe_cuda(cudaSetDevice(device_idx));
|
|
|
|
auto hist_builder = hist_vec[d_idx].GetBuilder();
|
|
auto d_left_child_smallest = left_child_smallest[d_idx].data();
|
|
int n_sub_bins = (n_nodes_level(depth) / 2) * hist_builder.n_bins;
|
|
|
|
dh::launch_n(device_idx, n_sub_bins, [=] __device__(int idx) {
|
|
int nidx = n_nodes(depth - 1) + ((idx / hist_builder.n_bins) * 2);
|
|
bool left_smallest = d_left_child_smallest[parent_nidx(nidx)];
|
|
if (left_smallest) {
|
|
nidx++; // If left is smallest switch to right child
|
|
}
|
|
|
|
int gidx = idx % hist_builder.n_bins;
|
|
gpair_sum_t parent = hist_builder.Get(gidx, parent_nidx(nidx));
|
|
int other_nidx = left_smallest ? nidx - 1 : nidx + 1;
|
|
gpair_sum_t other = hist_builder.Get(gidx, other_nidx);
|
|
gpair_sum_t sub = parent - other;
|
|
hist_builder.Add(
|
|
bst_gpair(sub.GetGrad(), sub.GetHess()), gidx,
|
|
nidx); // OPTMARK: This is slow, could use shared
|
|
// memory or cache results intead of writing to
|
|
// global memory every time in atomic way.
|
|
});
|
|
}
|
|
dh::synchronize_n_devices(n_devices, dList);
|
|
}
|
|
}
|
|
#define MIN_BLOCK_THREADS 128
|
|
#define CHUNK_BLOCK_THREADS 128
|
|
// MAX_BLOCK_THREADS of 1024 is hard-coded maximum block size due
|
|
// to CUDA capability 35 and above requirement
|
|
// for Maximum number of threads per block
|
|
#define MAX_BLOCK_THREADS 512
|
|
|
|
void FindSplit(int depth) {
|
|
// Specialised based on max_bins
|
|
this->FindSplitSpecialize(depth, Int<MIN_BLOCK_THREADS>());
|
|
}
|
|
|
|
template <int BLOCK_THREADS>
|
|
void FindSplitSpecialize(int depth, Int<BLOCK_THREADS>) {
|
|
if (param.max_bin <= BLOCK_THREADS) {
|
|
LaunchFindSplit<BLOCK_THREADS>(depth);
|
|
} else {
|
|
this->FindSplitSpecialize(depth,
|
|
Int<BLOCK_THREADS + CHUNK_BLOCK_THREADS>());
|
|
}
|
|
}
|
|
|
|
void FindSplitSpecialize(int depth, Int<MAX_BLOCK_THREADS>) {
|
|
this->LaunchFindSplit<MAX_BLOCK_THREADS>(depth);
|
|
}
|
|
|
|
template <int BLOCK_THREADS>
|
|
void LaunchFindSplit(int depth) {
|
|
bool colsample =
|
|
param.colsample_bylevel < 1.0 || param.colsample_bytree < 1.0;
|
|
|
|
int num_nodes_device = n_nodes_level(depth);
|
|
const int GRID_SIZE = num_nodes_device;
|
|
|
|
// all GPUs do same work
|
|
for (int d_idx = 0; d_idx < n_devices; d_idx++) {
|
|
int device_idx = dList[d_idx];
|
|
dh::safe_cuda(cudaSetDevice(device_idx));
|
|
|
|
int nodes_offset_device = 0;
|
|
find_split_kernel<BLOCK_THREADS><<<GRID_SIZE, BLOCK_THREADS>>>(
|
|
hist_vec[d_idx].GetLevelPtr(depth), feature_segments[d_idx].data(),
|
|
depth, info->num_col, hmat_.row_ptr.back(), nodes[d_idx].data(),
|
|
nodes_offset_device, fidx_min_map[d_idx].data(),
|
|
gidx_fvalue_map[d_idx].data(), GPUTrainingParam(param),
|
|
left_child_smallest[d_idx].data(), colsample,
|
|
feature_flags[d_idx].data());
|
|
}
|
|
|
|
// NOTE: No need to syncrhonize with host as all above pure P2P ops or
|
|
// on-device ops
|
|
}
|
|
void InitFirstNode(const std::vector<bst_gpair>& gpair) {
|
|
// Perform asynchronous reduction on each gpu
|
|
std::vector<bst_gpair> device_sums(n_devices);
|
|
#pragma omp parallel for num_threads(n_devices)
|
|
for (int d_idx = 0; d_idx < n_devices; d_idx++) {
|
|
int device_idx = dList[d_idx];
|
|
dh::safe_cuda(cudaSetDevice(device_idx));
|
|
auto begin = device_gpair[d_idx].tbegin();
|
|
auto end = device_gpair[d_idx].tend();
|
|
bst_gpair init = bst_gpair();
|
|
auto binary_op = thrust::plus<bst_gpair>();
|
|
device_sums[d_idx] = thrust::reduce(begin, end, init, binary_op);
|
|
}
|
|
|
|
bst_gpair sum = bst_gpair();
|
|
for (int d_idx = 0; d_idx < n_devices; d_idx++) {
|
|
sum += device_sums[d_idx];
|
|
}
|
|
|
|
// Setup first node so all devices have same first node (here done same on
|
|
// all devices, or could have done one device and Bcast if worried about
|
|
// exact precision issues)
|
|
for (int d_idx = 0; d_idx < n_devices; d_idx++) {
|
|
int device_idx = dList[d_idx];
|
|
|
|
auto d_nodes = nodes[d_idx].data();
|
|
auto gpu_param = GPUTrainingParam(param);
|
|
|
|
dh::launch_n(device_idx, 1, [=] __device__(int idx) {
|
|
bst_gpair sum_gradients = sum;
|
|
d_nodes[idx] = DeviceNodeStats(sum_gradients, 0, gpu_param);
|
|
});
|
|
}
|
|
// synch all devices to host before moving on (No, can avoid because
|
|
// BuildHist calls another kernel in default stream)
|
|
// dh::synchronize_n_devices(n_devices, dList);
|
|
}
|
|
void UpdatePosition(int depth) {
|
|
if (is_dense) {
|
|
this->UpdatePositionDense(depth);
|
|
} else {
|
|
this->UpdatePositionSparse(depth);
|
|
}
|
|
}
|
|
void UpdatePositionDense(int depth) {
|
|
for (int d_idx = 0; d_idx < n_devices; d_idx++) {
|
|
int device_idx = dList[d_idx];
|
|
|
|
auto d_position = position[d_idx].data();
|
|
DeviceNodeStats* d_nodes = nodes[d_idx].data();
|
|
auto d_gidx_fvalue_map = gidx_fvalue_map[d_idx].data();
|
|
auto d_gidx = device_matrix[d_idx].gidx;
|
|
auto n_columns = info->num_col;
|
|
size_t begin = device_row_segments[d_idx];
|
|
size_t end = device_row_segments[d_idx + 1];
|
|
|
|
dh::launch_n(device_idx, end - begin, [=] __device__(size_t local_idx) {
|
|
int pos = d_position[local_idx];
|
|
if (!is_active(pos, depth)) {
|
|
return;
|
|
}
|
|
DeviceNodeStats node = d_nodes[pos];
|
|
|
|
if (node.IsLeaf()) {
|
|
return;
|
|
}
|
|
|
|
int gidx = d_gidx[local_idx * static_cast<size_t>(n_columns) +
|
|
static_cast<size_t>(node.fidx)];
|
|
|
|
float fvalue = d_gidx_fvalue_map[gidx];
|
|
|
|
if (fvalue <= node.fvalue) {
|
|
d_position[local_idx] = left_child_nidx(pos);
|
|
} else {
|
|
d_position[local_idx] = right_child_nidx(pos);
|
|
}
|
|
});
|
|
}
|
|
dh::synchronize_n_devices(n_devices, dList);
|
|
// dh::safe_cuda(cudaDeviceSynchronize());
|
|
}
|
|
|
|
void UpdatePositionSparse(int depth) {
|
|
for (int d_idx = 0; d_idx < n_devices; d_idx++) {
|
|
int device_idx = dList[d_idx];
|
|
|
|
auto d_position = position[d_idx].data();
|
|
auto d_position_tmp = position_tmp[d_idx].data();
|
|
DeviceNodeStats* d_nodes = nodes[d_idx].data();
|
|
auto d_gidx_feature_map = gidx_feature_map[d_idx].data();
|
|
auto d_gidx_fvalue_map = gidx_fvalue_map[d_idx].data();
|
|
auto d_gidx = device_matrix[d_idx].gidx;
|
|
auto d_row_ptr = device_matrix[d_idx].row_ptr.tbegin();
|
|
|
|
size_t row_begin = device_row_segments[d_idx];
|
|
size_t row_end = device_row_segments[d_idx + 1];
|
|
size_t element_begin = device_element_segments[d_idx];
|
|
size_t element_end = device_element_segments[d_idx + 1];
|
|
|
|
// Update missing direction
|
|
dh::launch_n(device_idx, row_end - row_begin,
|
|
[=] __device__(int local_idx) {
|
|
int pos = d_position[local_idx];
|
|
if (!is_active(pos, depth)) {
|
|
d_position_tmp[local_idx] = pos;
|
|
return;
|
|
}
|
|
|
|
DeviceNodeStats node = d_nodes[pos];
|
|
|
|
if (node.IsLeaf()) {
|
|
d_position_tmp[local_idx] = pos;
|
|
return;
|
|
} else if (node.dir == LeftDir) {
|
|
d_position_tmp[local_idx] = pos * 2 + 1;
|
|
} else {
|
|
d_position_tmp[local_idx] = pos * 2 + 2;
|
|
}
|
|
});
|
|
|
|
// Update node based on fvalue where exists
|
|
// OPTMARK: This kernel is very inefficient for both compute and memory,
|
|
// dominated by memory dependency / access patterns
|
|
|
|
dh::TransformLbs(
|
|
device_idx, &temp_memory[d_idx], element_end - element_begin,
|
|
d_row_ptr, row_end - row_begin, is_dense,
|
|
[=] __device__(size_t local_idx, int local_ridx) {
|
|
int pos = d_position[local_ridx];
|
|
if (!is_active(pos, depth)) {
|
|
return;
|
|
}
|
|
|
|
DeviceNodeStats node = d_nodes[pos];
|
|
|
|
if (node.IsLeaf()) {
|
|
return;
|
|
}
|
|
|
|
int gidx = d_gidx[local_idx];
|
|
int findex =
|
|
d_gidx_feature_map[gidx]; // OPTMARK: slowest global
|
|
// memory access, maybe setup
|
|
// position, gidx, etc. as
|
|
// combined structure?
|
|
|
|
if (findex == node.fidx) {
|
|
float fvalue = d_gidx_fvalue_map[gidx];
|
|
|
|
if (fvalue <= node.fvalue) {
|
|
d_position_tmp[local_ridx] = left_child_nidx(pos);
|
|
} else {
|
|
d_position_tmp[local_ridx] = right_child_nidx(pos);
|
|
}
|
|
}
|
|
});
|
|
position[d_idx] = position_tmp[d_idx];
|
|
}
|
|
dh::synchronize_n_devices(n_devices, dList);
|
|
}
|
|
void ColSampleTree() {
|
|
if (param.colsample_bylevel == 1.0 && param.colsample_bytree == 1.0) return;
|
|
|
|
feature_set_tree.resize(info->num_col);
|
|
std::iota(feature_set_tree.begin(), feature_set_tree.end(), 0);
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feature_set_tree = col_sample(feature_set_tree, param.colsample_bytree);
|
|
}
|
|
void ColSampleLevel() {
|
|
if (param.colsample_bylevel == 1.0 && param.colsample_bytree == 1.0) return;
|
|
|
|
feature_set_level.resize(feature_set_tree.size());
|
|
feature_set_level = col_sample(feature_set_tree, param.colsample_bylevel);
|
|
std::vector<int> h_feature_flags(info->num_col, 0);
|
|
for (auto fidx : feature_set_level) {
|
|
h_feature_flags[fidx] = 1;
|
|
}
|
|
|
|
for (int d_idx = 0; d_idx < n_devices; d_idx++) {
|
|
int device_idx = dList[d_idx];
|
|
dh::safe_cuda(cudaSetDevice(device_idx));
|
|
|
|
feature_flags[d_idx] = h_feature_flags;
|
|
}
|
|
dh::synchronize_n_devices(n_devices, dList);
|
|
}
|
|
bool UpdatePredictionCache(const DMatrix* data,
|
|
std::vector<bst_float>* p_out_preds) override {
|
|
std::vector<bst_float>& out_preds = *p_out_preds;
|
|
|
|
if (nodes.empty() || !p_last_fmat_ || data != p_last_fmat_) {
|
|
return false;
|
|
}
|
|
|
|
if (!prediction_cache_initialised) {
|
|
for (int d_idx = 0; d_idx < n_devices; d_idx++) {
|
|
int device_idx = dList[d_idx];
|
|
size_t row_begin = device_row_segments[d_idx];
|
|
size_t row_end = device_row_segments[d_idx + 1];
|
|
|
|
prediction_cache[d_idx].copy(out_preds.begin() + row_begin,
|
|
out_preds.begin() + row_end);
|
|
}
|
|
prediction_cache_initialised = true;
|
|
}
|
|
dh::synchronize_n_devices(n_devices, dList);
|
|
|
|
float eps = param.learning_rate;
|
|
for (int d_idx = 0; d_idx < n_devices; d_idx++) {
|
|
int device_idx = dList[d_idx];
|
|
size_t row_begin = device_row_segments[d_idx];
|
|
size_t row_end = device_row_segments[d_idx + 1];
|
|
|
|
auto d_nodes = nodes[d_idx].data();
|
|
auto d_position = position[d_idx].data();
|
|
auto d_prediction_cache = prediction_cache[d_idx].data();
|
|
|
|
dh::launch_n(device_idx, prediction_cache[d_idx].size(),
|
|
[=] __device__(int local_idx) {
|
|
int pos = d_position[local_idx];
|
|
d_prediction_cache[local_idx] += d_nodes[pos].weight * eps;
|
|
});
|
|
|
|
dh::safe_cuda(
|
|
cudaMemcpy(&out_preds[row_begin], prediction_cache[d_idx].data(),
|
|
prediction_cache[d_idx].size() * sizeof(bst_float),
|
|
cudaMemcpyDeviceToHost));
|
|
}
|
|
dh::synchronize_n_devices(n_devices, dList);
|
|
|
|
return true;
|
|
}
|
|
void UpdateTree(const std::vector<bst_gpair>& gpair, DMatrix* p_fmat,
|
|
RegTree* p_tree) {
|
|
dh::Timer time0;
|
|
|
|
this->InitData(gpair, *p_fmat, *p_tree);
|
|
this->InitFirstNode(gpair);
|
|
this->ColSampleTree();
|
|
|
|
for (int depth = 0; depth < param.max_depth; depth++) {
|
|
this->ColSampleLevel();
|
|
this->BuildHist(depth);
|
|
this->FindSplit(depth);
|
|
this->UpdatePosition(depth);
|
|
}
|
|
|
|
// done with multi-GPU, pass back result from master to tree on host
|
|
int master_device = dList[0];
|
|
dh::safe_cuda(cudaSetDevice(master_device));
|
|
dense2sparse_tree(p_tree, nodes[0], param);
|
|
|
|
gpu_time += time0.ElapsedSeconds();
|
|
|
|
if (param.debug_verbose) {
|
|
LOG(CONSOLE)
|
|
<< "[GPU Plug-in] Cumulative GPU Time excluding initial time "
|
|
<< (gpu_time - gpu_init_time) << " sec";
|
|
fflush(stdout);
|
|
}
|
|
|
|
if (param.debug_verbose) {
|
|
LOG(CONSOLE) << "[GPU Plug-in] Cumulative CPU Time "
|
|
<< cpu_time.ElapsedSeconds() << " sec";
|
|
LOG(CONSOLE)
|
|
<< "[GPU Plug-in] Cumulative CPU Time excluding initial time "
|
|
<< (cpu_time.ElapsedSeconds() - cpu_init_time - gpu_time) << " sec";
|
|
fflush(stdout);
|
|
}
|
|
}
|
|
|
|
protected:
|
|
TrainParam param;
|
|
// std::unique_ptr<GPUHistBuilder> builder;
|
|
common::HistCutMatrix hmat_;
|
|
common::GHistIndexMatrix gmat_;
|
|
MetaInfo* info;
|
|
bool initialised;
|
|
bool is_dense;
|
|
const DMatrix* p_last_fmat_;
|
|
bool prediction_cache_initialised;
|
|
|
|
dh::bulk_allocator<dh::memory_type::DEVICE> ba;
|
|
|
|
std::vector<int> feature_set_tree;
|
|
std::vector<int> feature_set_level;
|
|
|
|
bst_uint num_rows;
|
|
int n_devices;
|
|
|
|
// below vectors are for each devices used
|
|
std::vector<int> dList;
|
|
std::vector<int> device_row_segments;
|
|
std::vector<size_t> device_element_segments;
|
|
|
|
std::vector<dh::CubMemory> temp_memory;
|
|
std::vector<DeviceHist> hist_vec;
|
|
std::vector<dh::dvec<DeviceNodeStats>> nodes;
|
|
std::vector<dh::dvec<DeviceNodeStats>> nodes_temp;
|
|
std::vector<dh::dvec<DeviceNodeStats>> nodes_child_temp;
|
|
std::vector<dh::dvec<bool>> left_child_smallest;
|
|
std::vector<dh::dvec<bool>> left_child_smallest_temp;
|
|
std::vector<dh::dvec<int>> feature_flags;
|
|
std::vector<dh::dvec<float>> fidx_min_map;
|
|
std::vector<dh::dvec<int>> feature_segments;
|
|
std::vector<dh::dvec<bst_float>> prediction_cache;
|
|
std::vector<dh::dvec<int>> position;
|
|
std::vector<dh::dvec<int>> position_tmp;
|
|
std::vector<DeviceGMat> device_matrix;
|
|
std::vector<dh::dvec<bst_gpair>> device_gpair;
|
|
std::vector<dh::dvec<int>> gidx_feature_map;
|
|
std::vector<dh::dvec<float>> gidx_fvalue_map;
|
|
|
|
std::vector<cudaStream_t*> streams;
|
|
std::vector<ncclComm_t> comms;
|
|
std::vector<std::vector<ncclComm_t>> find_split_comms;
|
|
|
|
double cpu_init_time;
|
|
double gpu_init_time;
|
|
dh::Timer cpu_time;
|
|
double gpu_time;
|
|
};
|
|
|
|
XGBOOST_REGISTER_TREE_UPDATER(GPUHistMaker, "grow_gpu_hist")
|
|
.describe("Grow tree with GPU.")
|
|
.set_body([]() { return new GPUHistMaker(); });
|
|
} // namespace tree
|
|
} // namespace xgboost
|